Embodiments of the invention generally relate to an apparatus and methods for forming a gate stack on a silicon, germanium or silicon germanium channel. More specifically, embodiments of the invention are directed to methods and apparatus for functionalizing the silicon, germanium, or silicon germanium substrate surface with one or more of sulfur and selenium to stabilize the surface bonds.
Integrated circuits may include more than one million micro-electronic field effect transistors (e.g., complementary metal-oxide-semiconductor (CMOS) field effect transistors) that are formed on a substrate and cooperate to perform various functions within the circuit. A CMOS transistor comprises a gate structure disposed over a channel region formed between source and drain regions of the transistor. The gate structure generally comprises a gate electrode and a gate dielectric. The gate electrode is disposed over the gate dielectric and, in operation, is used to control a flow of charge carriers (i.e., electric current) in the channel region beneath the gate dielectric.
Germanium is an attractive channel material for future CMOS devices, since both electron and hole mobilities are higher than those of silicon. An important technical issue associated with the use of germanium concerns the passivation of the germanium surface. Although high hole and electron mobility were reported for p-FET and n-FET with germanium channels with a germanium dioxide (GeO2) interfacial layer, the thermal instability of the germanium dioxide has been found to be an origin of a significant increase in gate leakage. Therefore, there is a need in the art for an interface passivation layer for germanium CMOS manufacture. Additionally, there is a need in the art for apparatus, methods and hardware platforms to achieve such an alternative passivation layer.